Travelled to:1 × Italy
3 × USA
Collaborated with:J.A.Abraham M.Pandey R.E.Bryant A.Biere E.M.Clarke Y.Zhu M.S.Abadir D.L.Beatty
Talks about:symbol (3) power (3) use (3) microprocessor (2) trajectori (2) formal (2) verif (2) evalu (2) properti (1) without (1)
Person: Richard Raimi
DBLP: Raimi:Richard
Contributed to:
1999
199919971996Wrote 4 papers:
- CAV-1999-BiereCRZ #model checking #safety #using
- Verifiying Safety Properties of a Power PC Microprocessor Using Symbolic Model Checking without BDDs (AB, EMC, RR, YZ), pp. 60–71.
- DAC-1999-RaimiA #detection
- Detecting False Timing Paths: Experiments on PowerPC Microprocessors (RR, JAA), pp. 737–741.
- DAC-1997-PandeyRBA #evaluation #using #verification
- Formal Verification of Content Addressable Memories Using Symbolic Trajectory Evaluation (MP, RR, REB, MSA), pp. 167–172.
- DAC-1996-PandeyRBB #array #evaluation #using #verification
- Formal Verification of PowerPC Arrays Using Symbolic Trajectory Evaluation (MP, RR, DLB, REB), pp. 649–654.