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Travelled to:
4 × USA
Collaborated with:
Y.Ohno S.Miyamoto N.Amano K.Sato T.Nagumo M.Nagai T.Nishida Y.Takamine S.Nagashima S.Kawabe Y.Ooshima A.Sugiyama N.Onizuka Y.Kazama O.Tada Y.Nagura N.Yamada T.Odaka T.Kozawa K.Ishihara
Talks about:
design (3) comput (3) simul (3) logic (3) veri (3) larg (3) techniqu (2) system (2) scale (2) fault (2)

Person: Masayuki Miyoshi

DBLP DBLP: Miyoshi:Masayuki

Contributed to:

DAC 19941994
DAC 19881988
DAC 19861986
DAC 19851985
DAC 19791979

Wrote 6 papers:

DAC-1994-NagumoNNMM #fault #named #reduction #using
VFSIM: Vectorized Fault Simulator Using a Reduction Technique Excluding Temporarily Unobservable Faults (TN, MN, TN, MM, SM), pp. 510–515.
DAC-1988-TakamineMNMK #algorithm #development
Clock Event Suppression Algorithm of VELVET and Its Application to S-820 Development (YT, SM, SN, MM, SK), pp. 716–719.
DAC-1986-MiyoshiOSOA #design #logic #scalability #simulation
An extensive logic simulation method of very large scale computer design (MM, YO, AS, NO, NA), pp. 360–365.
DAC-1986-OhnoMYOKI #design #scalability
Principles of design automatioon system for very large scale computer design (YO, MM, NY, TO, TK, KI), pp. 354–359.
DAC-1985-MiyoshiKTNA #logic #simulation
Speed up techniques of logic simulation (MM, YK, OT, YN, NA), pp. 812–815.
DAC-1979-OhnoMS #logic #scalability #using #verification
Logic verification system for very large computers using LSI’s (YO, MM, KS), pp. 367–374.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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