Proceedings of the 16th Design Automation Conference
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David W. Hightower
Proceedings of the 16th Design Automation Conference
DAC, 1979.

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@proceedings{DAC-1979,
	acmid         = "800292",
	address       = "San Diego, California, USA",
	editor        = "David W. Hightower",
	publisher     = "{ACM}",
	title         = "{Proceedings of the 16th Design Automation Conference}",
	year          = 1979,
}

Contents (90 items)

DAC-1979-Lauther #algorithm #graph #representation
A min-cut placement algorithm for general cell assemblies based on a graph representation (UL), pp. 1–10.
DAC-1979-Goto #2d #algorithm #layout #problem #slicing
A two-dimensional placement algorithm for the master slice LSI layout problem (SG), pp. 11–17.
DAC-1979-MuraiTKST
A hierarchical placement procedure with a simple blocking scheme (SM, HT, MK, KS, CT), pp. 18–23.
DAC-1979-StablerKK #algorithm #clustering
Placement algorithm by partitioning for optimum rectangular placement (EPS, VMK, VAK), pp. 24–25.
DAC-1979-CarterBS #incremental
Incremental processing applied to Steinberg’s placement procedure (HWC, MAB, ZAS), pp. 26–31.
DAC-1979-CarlsonPC #3d #data transformation #design #using
The use of color and 3-D temporal and spatial data management techniques in computer-aided design (WEC, REP, CC), pp. 32–38.
DAC-1979-Meyer #interactive #low cost #performance
A low cost satellite for fast interactive graphics in a time-sharing environment (BM), pp. 39–44.
DAC-1979-Chu #concept #design
Concepts of a microcomputer design language (YC), pp. 45–52.
DAC-1979-Zimmermann #design
The MIMOLA design system a computer aided digital processor design method (GZ), pp. 53–58.
DAC-1979-Marwedel #design
The MIMOLA design system: Detailed description of the software system (PM), pp. 59–63.
DAC-1979-Barbacci #evaluation #set #simulation #specification #synthesis
Instruction set processor specifications for simulation, evaluation, and synthesis (MB), pp. 64–72.
DAC-1979-ParkerTSBHLK #automation #design
The CMU design automation system: An example of automated data path design (ACP, DET, DPS, MB, LJH, GWL, JK), pp. 73–80.
DAC-1979-McCaw
Unified Shapes Checker — a checking tool for LSI (CRM), pp. 81–87.
DAC-1979-AkinoSKN #simulation #verification
Circuit simulation and timing verification based on MOS/LSI mask information (TA, MS, YK, TN), pp. 88–94.
DAC-1979-Chang #layout #recognition #using
LSI layout checking using bipolar device recognition technique (CSC), pp. 95–101.
DAC-1979-BekeS #automation #interactive #layout #named
CALMOS: A portable software system for the automatic and interactive layout of MOS/LSI (HB, WS), pp. 102–108.
DAC-1979-LallierJ
A new circuit placement program for FET chips (KWL, RKJ), pp. 109–113.
DAC-1979-IshiiYIS #diagrams #logic
An experimental input system of hand-drawn logic circuit diagram for LSI CAD (MI, MY, MI, HS), pp. 114–120.
DAC-1979-MatsuiTEMSYSNK #automation #pipes and filters
Automatic pipe routing and material take-off system for chemical plant (YM, HT, SE, NM, SS, CY, TS, SN, BK), pp. 121–127.
DAC-1979-Yessios #named
Stonewalls: Experiments in intelligent drafting (CIY), pp. 128–134.
DAC-1979-WeingartenKC #3d #interactive #named #using
DRAW3D: Time sharing graphic interaction using a device-space buffer (NHW, WK, MC), pp. 135–141.
DAC-1979-SchilerG #energy #simulation
Computer simulation of foliage shading in building energy loads (MS, DPG), pp. 142–148.
DAC-1979-Cha #fault #multi #network
Multiple fault diagnosis in combinational networks (CWC), pp. 149–155.
DAC-1979-Grason #metric #testing
TMEAS, a testability measurement program (JG), pp. 156–161.
DAC-1979-El-Ziq #fault #generative #network #performance #simulation #testing
Testing of MOS combinational networks a procedure for efficient fault simulation and test generation (YMEZ), pp. 162–170.
DAC-1979-Johnson #behaviour #development
Behavioral-level test development (WAJ), pp. 171–179.
DAC-1979-KjelkerudT #deduction #fault #generative #logic #simulation #testing #using
Generation of hazard free tests using the D-algorithm in a timing accurate system for logic and deductive fault simulation (EK, OT), pp. 180–184.
DAC-1979-ONeillSTFFWMBE #design #performance
Designers Workbench — efficient and economical design aids (LAO, CGS, TJT, JMF, RAF, EDW, PHM, JRB, DSE), pp. 185–199.
DAC-1979-Preiss #2d #3d #consistency #finite
A procedure for checking the topological consistency of a 2-D or 3-D finite element mesh (KP), pp. 200–206.
DAC-1979-RogersRS #design #modelling
Computer Aided Ship Design and numerically controlled production of towing tank models (DFR, FR, SGS), pp. 207–214.
DAC-1979-Bresnen #automation #metric
Automation of manufacturing planning, shop loading and work measurement in an engineering job shop environment (EJB), pp. 215–221.
DAC-1979-Lichten #design #parametricity #scalability
A partial solution to fitting large parametric surfaces in computer-aided design systems (LL), pp. 222–228.
DAC-1979-HsiehR #functional #latency #megamodelling
Macrosimulation with Quasi-general Symbolic FET Macromodel and Functional Latency (HYH, NBR), pp. 229–234.
DAC-1979-KjelkerudT79a #logic #modelling #simulation
Methods of modelling digital devices for logic simulation (EK, OT), pp. 235–241.
DAC-1979-Wilcox #functional #logic #simulation
Digital logic simulation at the gate and functional level (PSW), pp. 242–248.
DAC-1979-Sherwood #hybrid #logic #scheduling
A hybrid scheduling technique for hierarchical logic simulators or “Close Encounters of the Simulated Kind” (WS), pp. 249–254.
DAC-1979-NavabiH #performance #simulation
Efficient simulation of AHPL (ZN, FJH), pp. 255–262.
DAC-1979-GiambiasiMM #named #network #scalability #simulation
SILOG: A practical tool for large digital network simulation (NG, AM, DM), pp. 263–271.
DAC-1979-HillC #generative #multi #named #simulation
SABLE: A tool for generating structured, multi-level simulations (DDH, WMvC), pp. 272–279.
DAC-1979-CarterJB #design #simulation
Symbolic simulation for correct machine design (WCC, WHJJ, DB), pp. 280–286.
DAC-1979-UeharaC #array #functional #layout
Optimal layout of CMOS functional arrays (TU, WMvC), pp. 287–289.
DAC-1979-KawamotoK
The minimum width routing of A 2-row 2-layer polycell-layout (TK, YK), pp. 290–296.
DAC-1979-SatoNSY #design #layout #named
MIRAGE — a simple-model routing program for the hierarchical layout design of IC masks (KS, TN, HS, TY), pp. 297–304.
DAC-1979-Gray #compilation
Introduction to silicon compilation (JPG), pp. 305–306.
DAC-1979-Ayres #specification
IC specification language (RA), pp. 307–309.
DAC-1979-Johannsen #compilation
Bristle Blocks: A silicon compiler (DJ), pp. 310–313.
DAC-1979-Ayres79a #using
Silicon compilation-a hierarchical use of PLAs (RA), pp. 314–326.
DAC-1979-WangB #automation
A software system for Automated Placement And Wiring of LSI chips (PTW, PB), pp. 327–329.
DAC-1979-BennettSC #design #editing #interactive
Dynamic design rule checking in an interactive printed circuit editor (TCB, KRS, WMvC), pp. 330–336.
DAC-1979-Johnson79a #layout
PC board layout techniques (DRJ), pp. 337–343.
DAC-1979-Cronin
Views of a vendor (MJC), p. 346.
DAC-1979-Kane #automation #design
Design Automation concerns (JBK), pp. 347–348.
DAC-1979-Losleben #automation #design #future of
Future of design automation (PL), p. 349.
DAC-1979-Magnuson #development
Moving a D.A. system from development to production (WGMJ), pp. 350–351.
DAC-1979-Peterson #automation #design
Design Automation philosophies (DLP), p. 352.
DAC-1979-LeinwandL #abstraction #design #functional #verification
Design verification based on functional abstraction (SML, TL), pp. 353–359.
DAC-1979-KawatoSMU #design #scalability #using #verification
Design and verification of large-scale computers by using DDL (NK, TS, FM, TU), pp. 360–366.
DAC-1979-OhnoMS #logic #scalability #using #verification
Logic verification system for very large computers using LSI’s (YO, MM, KS), pp. 367–374.
DAC-1979-Darringer #hardware #verification
The application of program verification techniques to hardware verification (JAD), pp. 375–381.
DAC-1979-Harvel #automation #design #effectiveness
Cost effective data entry techniques for design automation (JTH), p. 382.
DAC-1979-Ozdemir
Electron beam lithography (FSO), pp. 383–391.
DAC-1979-Rath
Hughes S&CG custom LSI layouts — “we did it our way” (RRR), pp. 392–397.
DAC-1979-WongB #database #design
A Computer-Aided Design data base (SW, WAB), pp. 398–402.
DAC-1979-GardnerW #modelling #simulation
Hierarchical modeling and simulation in VISTA (RIG, PBW), pp. 403–405.
DAC-1979-Corrigan #clustering
A placement capability based on partitioning (LIC), pp. 406–413.
DAC-1979-SucherW #component #database #design
A design aids data base for digital components (DJS, DFW), pp. 414–420.
DAC-1979-Hoskins #database #design
Descriptive databases in some design/manufacturing environments (EMH), pp. 421–436.
DAC-1979-NiengB #component #library
Component library for an integratel DA system (KYN, DAB), pp. 437–444.
DAC-1979-Wilmore #database #design #interactive #layout #performance
The design of an efficient data base to support an interactive LSI layout system (JAW), pp. 445–451.
DAC-1979-Oakes #design
The complete VLSI design system (MFO), pp. 452–460.
DAC-1979-LoslebenT #analysis
Topological analysis for VLSI circuits (PL, KT), pp. 461–473.
DAC-1979-PreasC #algorithm
Placement algorithms for arbitrarily shaped blocks (BP, WMvC), pp. 474–480.
DAC-1979-Soukup
Global router (JS), pp. 481–484.
DAC-1979-Pimont #algorithm
New algorithms for grid-less routing of high density printed circuit boards (SP), p. 485.
DAC-1979-Foster #lookahead #multi
A “lookahead” router for multilayer printed wiring boards (JCF), pp. 486–493.
DAC-1979-DysartK #automation #bound #branch
An application of branch and bound method to automatic printed circuit board routing (LD, MK), pp. 494–499.
DAC-1979-Marvik #interactive #online #sketching
An interactive routing program with On-line clean-up of sketched routes (OAM), pp. 500–505.
DAC-1979-SaharaKN #interactive #layout
An interactive layout system of analog printed wiring boards (KiS, KiK, IN), pp. 506–512.
DAC-1979-Parke #design
An introduction to the N. mPc design environment (FIP), pp. 513–519.
DAC-1979-RoseRS
The N. mPc system description facility (CWR, LAR, RS), pp. 520–528.
DAC-1979-ParkeHR #runtime
The N.mPc runtime environment (FIP, DCHJ, CWR), pp. 529–536.
DAC-1979-OrdyP #design #evaluation
An evaluation of the N. mPc design environment (GMO, FIP), pp. 537–542.
DAC-1979-Giuliani #design #tool support
Will Disign tools catch up to VLSI design (DG), pp. 544–545.
DAC-1979-Waxman #challenge #design #named
VLSI — a design challenge (RW), pp. 546–547.
DAC-1979-Lattin #design #problem
VLSI design methodology the problem of the 80’s for microprocessor design (BL), pp. 548–549.
DAC-1979-Wiemann
CAD system for VLSI (WW), p. 550.
DAC-1979-Larsen #design #problem #question
Can CAD meet the VLSI design problems of the 80’s? (RPL), p. 551.
DAC-1979-Hightower #design #problem
Can CAD meet the VLSI design problems of the 80’s (DWH), pp. 552–553.
DAC-1979-Cleemput #hardware
Computer hardware description languages and their applications (WMvC), pp. 554–560.
DAC-1979-Bening #logic #physics #simulation
Developments in computer simulation of gate level physical logic (LB), pp. 561–567.

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