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Travelled to:
1 × France
1 × Germany
1 × Portugal
Collaborated with:
E.Biersack A.Pilger C.Weis N.Wehn M.Sadri L.Benini P.Ehses C.Santos P.Vivet S.Goossens M.Koedam
Talks about:
wide (2) dram (2) temperatur (1) implement (1) framework (1) prototyp (1) protocol (1) refresh (1) network (1) variat (1)

Person: Matthias Jung

DBLP DBLP: Jung:Matthias

Contributed to:

DATE 20152015
DATE 20142014
ICEIS 19991999

Wrote 3 papers:

DATE-2015-Weis0ESVGKW #fault #metric #modelling
Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs (CW, MJ, PE, CS, PV, SG, MK, NW), pp. 495–500.
DATE-2014-Sadri0WWB #3d #energy #optimisation #using
Energy optimization in 3D MPSoCs with Wide-I/O DRAM using temperature variation aware bank-wise refresh (MS, MJ, CW, NW, LB), pp. 1–4.
ICEIS-1999-JungBP #agile #framework #implementation #network #protocol #prototype
Implementing Network Protocols in Java-A Framework for Rapid Prototyping (MJ, EB, AP), pp. 649–656.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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