Travelled to:1 × USA
3 × France
Collaborated with:H.Sarbazi-Azad A.Tavakkol A.Mazloumi N.Teimouri M.Arjomand M.Asadinia A.Mirhosseini M.Sadrosadati A.Fakhrzadehgan
Talks about:chip (5) network (4) circuit (3) switch (3) packet (3) effici (3) base (3) virtual (2) hybrid (2) power (2)
Person: Mehdi Modarressi
DBLP: Modarressi:Mehdi
Contributed to:
2015
20132011
20102009Wrote 6 papers:
- DATE-2015-MazloumiM #hybrid #memory management #multi
- A hybrid packet/circuit-switched router to accelerate memory access in NoC-based chip multiprocessors (AM, MM), pp. 908–911.
- DATE-2015-MirhosseiniSFMS #energy #network
- An energy-efficient virtual channel power-gating mechanism for on-chip networks (AM, MS, AF, MM, HSA), pp. 1527–1532.
- PDP-2013-TeimouriMS #performance
- Power and Performance Efficient Partial Circuits in Packet-Switched Networks-on-Chip (NT, MM, HSA), pp. 509–513.
- DATE-2011-AsadiniaMTS #using
- Supporting non-contiguous processor allocation in mesh-based CMPs using virtual point-to-point links (MA, MM, AT, HSA), pp. 413–418.
- DAC-2010-ModarressiST #architecture #configuration management #network #performance
- An efficient dynamically reconfigurable on-chip network architecture (MM, HSA, AT), pp. 166–169.
- DATE-2009-ModarressiSA #hybrid #network
- A hybrid packet-circuit switched on-chip network based on SDM (MM, HSA, MA), pp. 566–569.