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Travelled to:
3 × France
4 × USA
Collaborated with:
G.G.E.Gielen P.J.Vancorenland W.M.C.Sansen P.Palmers T.McConaghy T.Eeckelaert R.Schoofs J.Vandenbussche K.Uyttenhove E.Lauwers C.D.Ranter B.D.Muer G.V.d.Plas
Talks about:
design (5) topolog (4) convert (3) analog (3) multi (3) methodolog (2) systemat (2) interpol (2) hierarch (2) circuit (2)

Person: Michiel Steyaert

DBLP DBLP: Steyaert:Michiel

Contributed to:

DATE 20092009
DAC 20072007
DATE 20072007
DAC 20062006
DAC 20022002
DATE 20022002
DAC 20002000

Wrote 9 papers:

DATE-2009-PalmersMSG #multi
Massively multi-topology sizing of analog integrated circuits (PP, TM, MS, GGEG), pp. 706–711.
DAC-2007-McConaghyPGS #multi
Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies (TM, PP, GGEG, MS), pp. 944–947.
DATE-2007-EeckelaertSGSS #performance #synthesis
An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection (TE, RS, GGEG, MS, WMCS), pp. 81–86.
DAC-2006-EeckelaertSGSS #design #optimisation #standard
Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard (TE, RS, GGEG, MS, WMCS), pp. 25–30.
DAC-2002-SteyaertV #named #paradigm #power management #question
CMOS: a paradigm for low power wireless? (MS, PJV), pp. 836–841.
DAC-2002-VandenbusscheULSG #design
Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter (JV, KU, EL, MS, GGEG), pp. 449–454.
DATE-2002-VandenbusscheLUSG #design
Systematic Design of a 200 Ms/S 8-bit Interpolating A/D Converter (JV, EL, KU, MS, GGEG), pp. 357–361.
DAC-2000-RanterMPVSGS #automation #design #layout #named
CYCLONE: automated design and layout of RF LC-oscillators (CDR, BDM, GVdP, PJV, MS, GGEG, WMCS), pp. 11–14.
DAC-2000-VancorenlandRSG #algorithm #design #using
Optimal RF design using smart evolutionary algorithms (PJV, CDR, MS, GGEG), pp. 7–10.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.