Travelled to:2 × France
2 × Germany
Collaborated with:B.M.Al-Hashimi K.Chakrabarty M.Lampropoulos A.Ejlali S.G.Miremadi L.Dilillo P.Girard
Talks about:power (2) minim (2) test (2) crosstalk (1) techniqu (1) consider (1) thermal (1) schedul (1) perform (1) network (1)
Person: Paul M. Rosinger
DBLP: Rosinger:Paul_M=
Contributed to:
2007200620052004Wrote 4 papers:
- DATE-2007-EjlaliARM #energy #fault tolerance #network #performance
- Joint consideration of fault-tolerance, energy-efficiency and performance in on-chip networks (AE, BMAH, PMR, SGM), pp. 1647–1652.
- DATE-2006-DililloRAG #process #reduction
- Minimizing test power in SRAM through reduction of pre-charge activity (LD, PMR, BMAH, PG), pp. 1159–1164.
- DATE-2005-RosingerAC #agile #generative
- Rapid Generation of Thermal-Safe Test Schedules (PMR, BMAH, KC), pp. 840–845.
- DATE-v2-2004-LampropoulosAR #using
- Minimization of Crosstalk Noise, Delay and Power Using a Modified Bus Invert Technique (ML, BMAH, PMR), pp. 1372–1373.