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Travelled to:
1 × USA
3 × Germany
Collaborated with:
N.Srivastava K.Banerjee Z.Mahmood L.Daniel P.d.Dood J.Wawrzynek E.Liu
Talks about:
interconnect (2) substrat (2) frequenc (2) extract (2) effici (2) layer (2) imped (2) high (2) multiport (1) framework (1)

Person: Roberto Suaya

DBLP DBLP: Suaya:Roberto

Contributed to:

DATE 20122012
DATE 20102010
DATE 20082008
DAC 19911991

Wrote 4 papers:

DATE-2012-MahmoodSD #framework #linear #modelling #multi #performance
An efficient framework for passive compact dynamical modeling of multiport linear systems (ZM, RS, LD), pp. 1203–1208.
DATE-2010-SrivastavaSB #3d #performance
Efficient 3D high-frequency impedance extraction for general interconnects and inductors above a layered substrate (NS, RS, KB), pp. 459–464.
DATE-2008-SrivastavaSB #multi
High-Frequency Mutual Impedance Extraction of VLSI Interconnects In the Presence of a Multi-layer Conducting Substrate (NS, RS, KB), pp. 426–431.
DAC-1991-DoodWLS #2d #geometry
A Two-Dimensional Topological Compactor With Octagonal Geometry (PdD, JW, EL, RS), pp. 727–731.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.