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Travelled to:
1 × Italy
2 × France
2 × Germany
Collaborated with:
C.A.Prete T.M.Jones L.Ramini P.Grani D.Bertozzi J.Maebe D.Chanet B.D.Bus J.Cavazos M.F.P.O'Boyle A.Ghiribaldi H.T.Fankem
Talks about:
cach (3) transform (2) techniqu (2) instruct (2) energi (2) effici (2) power (2) optic (2) embed (2) no (2)

Person: Sandro Bartolini

DBLP DBLP: Bartolini:Sandro

Contributed to:

DATE 20142014
DATE 20132013
CGO 20112011
DATE 20082008
SCAM 20012001
SCAM 20012002

Wrote 6 papers:

DATE-2014-RaminiGGBFB #architecture #energy
Assessing the energy break-even point between an optical NoC architecture and an aggressive electronic baseline (LR, AG, PG, SB, HTF, DB), pp. 1–6.
DATE-2013-RaminiGBB #3d #analysis #manycore #power management #using
Contrasting wavelength-routed optical NoC topologies for power-efficient 3D-stacked multicore processors using physical-layer analysis (LR, PG, SB, DB), pp. 1589–1594.
CGO-2011-JonesBMC #optimisation #performance
Link-time optimization for power efficiency in a tagless instruction cache (TMJ, SB, JM, DC), pp. 32–41.
DATE-2008-JonesBBCO #compilation #energy
Instruction Cache Energy Saving Through Compiler Way-Placement (TMJ, SB, BDB, JC, MFPO), pp. 1196–1201.
SCAM-2001-BartoliniP #embedded #performance
An Object Level Transformation Technique to Improve the Performance of Embedded Applications (SB, CAP), pp. 26–34.
SCAM-J-2001-BartoliniP02 #embedded #program transformation
A cache-aware program transformation technique suitable for embedded systems (SB, CAP), pp. 783–795.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.