Travelled to:1 × Mexico
1 × Spain
1 × USA
Collaborated with:B.Falsafi M.D.Powell T.N.Vijaykumar C.F.Chen A.Moshovos K.Roy
Talks about:submicron (2) deep (2) cach (2) architectur (1) processor (1) approach (1) spatial (1) predict (1) perform (1) pattern (1)
Person: Se-Hyun Yang
DBLP: Yang:Se=Hyun
Contributed to:
200420022001Wrote 3 papers:
- HPCA-2004-ChenYFM #effectiveness #predict
- Accurate and Complexity-Effective Spatial Pattern Prediction (CFC, SHY, BF, AM), pp. 276–287.
- HPCA-2002-YangPFV #design #energy
- Exploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay (SHY, MDP, BF, TNV), pp. 151–161.
- HPCA-2001-YangPFRV #approach #architecture
- An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches (SHY, MDP, BF, KR, TNV), pp. 147–157.