Travelled to:1 × Mexico
4 × USA
Collaborated with:T.N.Vijaykumar S.Yang B.Falsafi M.A.Gomaa K.K.Rangan G.Wei D.M.Brooks K.Roy A.Biswas J.S.Emer S.S.Mukherjee B.R.Sheikh S.M.Yardi
Talks about:submicron (2) perform (2) power (2) deep (2) cach (2) run (2) architectur (1) throughput (1) processor (1) heterogen (1)
Person: Michael D. Powell
DBLP: Powell:Michael_D=
Contributed to:
20112009
200420022001Wrote 5 papers:
- HPCA-2011-RanganPWB #performance #throughput
- Achieving uniform performance and maximizing throughput in the presence of heterogeneity (KKR, MDP, GYW, DMB), pp. 3–14.
- HPCA-2009-PowellBEMSY #named #parametricity #runtime #using
- CAMP: A technique to estimate per-structure power at run-time using a few simple parameters (MDP, AB, JSE, SSM, BRS, SMY), pp. 289–300.
- ASPLOS-2004-GomaaPV #named #operating system #smt
- Heat-and-run: leveraging SMT and CMP to manage power density through the operating system (MAG, MDP, TNV), pp. 260–270.
- HPCA-2002-YangPFV #design #energy
- Exploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay (SHY, MDP, BF, TNV), pp. 151–161.
- HPCA-2001-YangPFRV #approach #architecture
- An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches (SHY, MDP, BF, KR, TNV), pp. 147–157.