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Travelled to:
2 × USA
Collaborated with:
J.Cong Y.Hwang
Talks about:
technolog (2) fpgas (2) delay (2) map (2) interconnect (1) nonuniform (1) heterogen (1) optim (1) fast (1) pin (1)

Person: Songjie Xu

DBLP DBLP: Xu:Songjie

Contributed to:

DAC 19991999
DAC 19981998

Wrote 2 papers:

DAC-1999-CongHX #performance
Technology Mapping for FPGAs with Nonuniform Pin Delays and Fast Interconnections (JC, YYH, SX), pp. 373–378.
DAC-1998-CongX
Delay-Optimal Technology Mapping for FPGAs with Heterogeneous LUTs (JC, SX), pp. 704–707.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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