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Travelled to:
1 × France
1 × USA
Collaborated with:
M.Chiang T.Yoshimura Y.Nakamura M.Tagata S.Tawada K.Yoshikawa
Talks about:
perform (2) high (2) placement (1) hierarch (1) circuit (1) regist (1) method (1) design (1) budget (1) scale (1)

Person: Takumi Okamoto

DBLP DBLP: Okamoto:Takumi

Contributed to:

DATE 20092009
DAC 20062006

Wrote 2 papers:

DATE-2009-ChiangOY
Register placement for high-performance circuits (MFC, TO, TY), pp. 1470–1475.
DAC-2006-NakamuraTOTY #design #scalability
Budgeting-free hierarchical design method for large scale and high-performance LSIs (YN, MT, TO, ST, KY), pp. 955–958.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.