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Travelled to:
1 × France
1 × Germany
1 × USA
Collaborated with:
T.Okamoto T.Yoshimura H.Chen Y.Chang L.Chen B.Han Y.Wang Y.Liu Y.Liu D.Zhang S.Li B.Sai H.Yang
Talks about:
architectur (1) nonvolatil (1) processor (1) placement (1) recoveri (1) gridless (1) compress (1) perform (1) circuit (1) regist (1)

Person: Mei-Fang Chiang

DBLP DBLP: Chiang:Mei=Fang

Contributed to:

DATE 20122012
DATE 20092009
DAC 20062006

Wrote 3 papers:

DATE-2012-WangLLZLSCY #architecture
A compression-based area-efficient recovery architecture for nonvolatile processors (YW, YL, YL, DZ, SL, BS, MFC, HY), pp. 1519–1524.
Register placement for high-performance circuits (MFC, TO, TY), pp. 1470–1475.
DAC-2006-ChenCCCH #novel
Novel full-chip gridless routing considering double-via insertion (HYC, MFC, YWC, LC, BH), pp. 755–760.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.