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Travelled to:
1 × USA
Collaborated with:
M.Ekpanyapong J.R.Minz H.S.Lee S.K.Lim
Talks about:
microarchitectur (1) submicron (1) processor (1) floorplan (1) profil (1) design (1) guid (1) deep (1)

Person: Thaisiri Watewai

DBLP DBLP: Watewai:Thaisiri

Contributed to:

DAC 20042004

Wrote 1 papers:

DAC-2004-EkpanyapongMWLL #architecture #design
Profile-guided microarchitectural floorplanning for deep submicron processor design (ME, JRM, TW, HHSL, SKL), pp. 634–639.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.