BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × Germany
2 × USA
Collaborated with:
S.K.Lim H.S.Lee R.M.Rabbah H.Sandanagobalane W.Wong J.R.Minz T.Watewai M.B.Healy M.Vittes C.S.Ballapuram G.H.Loh
Talks about:
microarchitectur (2) floorplan (2) submicron (1) processor (1) tradeoff (1) prefetch (1) orchestr (1) thermal (1) perform (1) specul (1)

Person: Mongkol Ekpanyapong

DBLP DBLP: Ekpanyapong:Mongkol

Contributed to:

DATE 20062006
ASPLOS 20042004
DAC 20042004

Wrote 3 papers:

DATE-2006-HealyVEBLLL #architecture #performance #trade-off
Microarchitectural floorplanning under performance and thermal tradeoff (MBH, MV, ME, CSB, SKL, HHSL, GHL), pp. 1288–1293.
ASPLOS-2004-RabbahSEW #compilation
Compiler orchestrated prefetching via speculation and predication (RMR, HS, ME, WFW), pp. 189–198.
DAC-2004-EkpanyapongMWLL #architecture #design
Profile-guided microarchitectural floorplanning for deep submicron processor design (ME, JRM, TW, HHSL, SKL), pp. 634–639.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.