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Travelled to:
1 × France
Collaborated with:
R.Lee C.Chin C.Kuan H.Chen Y.Kajitani
Talks about:
boundari (1) speed (1) escap (1) board (1) rout (1) high (1) pin (1) fix (1)

Person: Tsung-Ying Tsai

DBLP DBLP: Tsai:Tsung=Ying

Contributed to:

DATE 20112011

Wrote 1 papers:

DATE-2011-TsaiLCKCK #bound #on the
On routing fixed escaped boundary pins for high speed boards (TYT, RJL, CYC, CYK, HMC, YK), pp. 461–466.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.