Travelled to:
1 × France
1 × USA
Collaborated with:
M.C.Chao H.Yang R.Huang S.Lin T.Tsai R.Lee C.Kuan H.Chen Y.Kajitani
Talks about:
boundari (1) speed (1) model (1) macro (1) fault (1) escap (1) embed (1) board (1) rout (1) high (1)
Person: Ching-Yu Chin
DBLP: Chin:Ching=Yu
Contributed to:
Wrote 2 papers:
- DATE-2011-TsaiLCKCK #bound #on the
- On routing fixed escaped boundary pins for high speed boards (TYT, RJL, CYC, CYK, HMC, YK), pp. 461–466.
- DAC-2009-ChaoYHLC #fault #metaprogramming #modelling
- Fault models for embedded-DRAM macros (MCTC, HYY, RFH, SCL, CYC), pp. 714–719.