Travelled to:1 × Canada
1 × Denmark
1 × Israel
1 × Italy
1 × Poland
1 × Spain
1 × Taiwan
2 × China
2 × Portugal
2 × United Kingdom
3 × USA
4 × Germany
5 × France
Collaborated with:P.Pettersson N.Guan P.Krcál K.G.Larsen Q.Deng E.Fersman F.Larsson A.David F.Kong T.Amnell H.Lin B.Jonsson Y.Tang L.Mokrushin G.Pu J.He J.Bengtsson P.A.Abdulla M.O.Möller M.Lindahl U.Holmer Y.Wang C.Gu X.Yang M.Lv X.Gong Z.Zhang J.Pei D.V.Hung J.Abdullah M.Stigge G.Behrmann J.Pearson C.Weise C.Li Y.Gu J.Qi G.Yu R.Zhang X.Zhao S.Wang Z.Qiu W.O.D.Griffioen K.J.Kristoffersen
Talks about:time (16) analysi (8) schedul (7) real (6) automata (5) use (5) process (4) system (4) effici (4) model (4)
Person: Wang Yi
DBLP: Yi:Wang
Facilitated 2 volumes:
Ed
EdContributed to:
20152015
2014201420132011
2011
2011
2007
2006
2004
200420042003
2002200220002000200019991998199719961996
19951991Wrote 28 papers:
- DATE-2015-GuanTW0 #analysis #realtime
- Delay analysis of structural real-time workload (NG, YT, YW, WY), pp. 223–228.
- TACAS-2015-GuanTAS0 #analysis #refinement #scalability
- Scalable Timing Analysis with Refinement (NG, YT, JA, MS, WY), pp. 3–18.
- VLDB-2015-Li0QYZ014 #query #set #using
- Processing Moving kNN Queries Using Influential Neighbor Sets (CL, YG, JQ, GY, RZ, WY), pp. 113–124.
- DATE-2014-GuGD0 #multi #scheduling
- Partitioned mixed-criticality scheduling on multiprocessor platforms (CG, NG, QD, WY), pp. 1–6.
- DATE-2014-Guan0 #analysis #performance #scheduling
- General and efficient Response Time Analysis for EDF scheduling (NG, WY), pp. 1–6.
- DATE-2013-GuanYL0 #analysis #approach #estimation
- FIFO cache analysis for WCET estimation: a quantitative approach (NG, XY, ML, WY), pp. 296–301.
- DATE-2011-KongYD #clustering #energy #multi #realtime #scheduling
- Energy-efficient scheduling of real-time tasks on cluster-based multicores (FK, WY, QD), pp. 1135–1140.
- ICEIS-v1-2011-GongZPY #information management #integration #research
- Research on the Information Integration of China’s Basic Industries Trademark Information Service (XG, ZZ, JP, WY), pp. 495–503.
- SAC-2011-KongGDY #energy #parallel #realtime #scheduling
- Energy-efficient scheduling for parallel real-time tasks based on level-packing (FK, NG, QD, WY), pp. 635–640.
- FoSSaCS-2007-AbdullaKY #automaton
- Sampled Universality of Timed Automata (PAA, PK, WY), pp. 2–16.
- CAV-2006-KrcalY #automaton #communication #verification
- Communicating Timed Automata: The More Synchronous, the More Difficult to Verify (PK, WY), pp. 249–262.
- IFM-2004-PuHHY #approach #clustering #hardware
- An Optimal Approach to Hardware/Software Partitioning for Synchronous Model (GP, DVH, JH, WY), pp. 363–381.
- SEFM-2004-GeguangXSZHY #approach #clustering #hardware #multi
- An Approach to Hardware/Software Partitioning for Multiple Hardware Devices Model (GP, XZ, SW, ZQ, JH, WY), pp. 376–385.
- TACAS-2004-KrcalY #analysis #automaton #decidability #problem #scheduling #using
- Decidable and Undecidable Problems in Schedulability Analysis Using Timed Automata (PK, WY), pp. 236–250.
- TACAS-2003-FersmanMPY #analysis #scheduling #using
- Schedulability Analysis Using Two Clocks (EF, LM, PP, WY), pp. 224–239.
- FASE-2002-DavidMY #realtime #uml #verification
- Formal Verification of UML Statecharts with Real-Time Extensions (AD, MOM, WY), pp. 218–232.
- TACAS-2002-AmnellFMPY #embedded #implementation #modelling #named
- TIMES — A Tool for Modelling and Implementation of Embedded Systems (TA, EF, LM, PP, WY), pp. 460–464.
- TACAS-2002-FersmanPY #automaton #decidability #process #scheduling
- Timed Automata with Asynchronous Processes: Schedulability and Decidability (EF, PP, WY), pp. 67–82.
- FoSSaCS-2000-LinY #automaton #proving
- A Proof System for Timed Automata (HL, WY), pp. 208–222.
- LCTES-2000-AmnellDY #hybrid #realtime
- A Real-Time Animator for Hybrid Systems (TA, AD, WY), pp. 134–145.
- TACAS-2000-LarssonPY #model checking #on the #problem #traversal
- On Memory-Block Traversal Problems in Model-Checking Timed-Systems (FL, PP, WY), pp. 127–141.
- CAV-1999-BehrmannLPWY #analysis #diagrams #difference #performance #reachability #using
- Efficient Timed Reachability Analysis Using Clock Difference Diagrams (GB, KGL, JP, CW, WY), pp. 341–353.
- TACAS-1998-LindahlPY #analysis #design
- Formal Design and Analysis of a Gear Controller (ML, PP, WY), pp. 281–297.
- CAV-1997-LarsenPY #named
- UPPAAL: Status & Developments (KGL, PP, WY), pp. 456–459.
- CAV-1996-BengtssonGKLLPY #protocol #using #verification
- Verification of an Audio Protocol with Bus Collision Using UPPAAL (JB, WODG, KJK, KGL, FL, PP, WY), pp. 244–256.
- TACAS-1996-BengtssonLLPY
- UPPAAL in 1995 (JB, KGL, FL, PP, WY), pp. 431–434.
- LICS-1995-JonssonY #composition #probability #process #testing
- Compositional Testing Preorders for Probabilistic Processes (BJ, WY), pp. 431–441.
- CAV-1991-HolmerLY #process #realtime
- Deciding Properties of Regular Real Time Processes (UH, KGL, WY), pp. 443–453.