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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
4 × USA
Collaborated with:
J.Cong Y.Fan G.Liu M.Tan S.Dai R.Zhao K.Hao G.Han W.Jiang
Talks about:
synthesi (3) pipelin (3) effici (3) level (3) high (3) communic (2) interconnect (1) architectur (1) reconfigur (1) algorithm (1)

Person: Zhiru Zhang

DBLP DBLP: Zhang:Zhiru

Contributed to:

DAC 20152015
DAC 20142014
DAC 20062006
DAC 20042004

Wrote 6 papers:

DAC-2015-LiuZ #configuration management #performance
A reconfigurable analog substrate for highly efficient maximum flow computation (GL, ZZ), p. 6.
DAC-2015-ZhaoTDZ #pipes and filters #synthesis
Area-efficient pipelining for FPGA-targeted high-level synthesis (RZ, MT, SD, ZZ), p. 6.
DAC-2014-DaiTHZ #pipes and filters #synthesis
Flushing-Enabled Loop Pipelining for High-Level Synthesis (SD, MT, KH, ZZ), p. 6.
DAC-2006-CongFHJZ #behaviour #communication
Behavior and communication co-optimization for systems with sequential communication media (JC, YF, GH, WJ, ZZ), pp. 675–678.
DAC-2006-CongZ #algorithm #performance #scheduling
An efficient and versatile scheduling algorithm based on SDC formulation (JC, ZZ), pp. 433–438.
DAC-2004-CongFZ #architecture #automation #pipes and filters #synthesis
Architecture-level synthesis for automatic interconnect pipelining (JC, YF, ZZ), pp. 602–607.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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