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Used together with:
carbon (27)
circuit (10)
design (7)
logic (6)
architectur (3)

Stem nanotub$ (all stems)

27 papers:

DATEDATE-2014-SunMSPL #design #power management #robust
A low power and robust carbon nanotube 6T SRAM design with metallic tolerance (LS, JM, RAS, DKP, ZL), pp. 1–4.
DACDAC-2013-HillsZMSWWM #agile #design #guidelines
Rapid exploration of processing and design guidelines to overcome carbon nanotube variations (GH, JZ, CM, MMS, HW, HSPW, SM), p. 10.
DACDAC-2013-ShulakerRHCGWM #named
Sacha: the Stanford carbon nanotube controlled handshaking robot (MMS, JVR, GH, HYC, GGEG, HSPW, SM), p. 3.
DATEDATE-2013-WeiSHCLLZWM #challenge
Carbon nanotube circuits: opportunities and challenges (HW, MMS, GH, HYC, CSL, LL, JZ, HSPW, SM), pp. 619–624.
DATEDATE-2012-BesteT #analysis #robust #standard
Layout-Driven Robustness Analysis for misaligned Carbon Nanotubes in CNTFET-based standard cells (MB, MBT), pp. 1609–1614.
DACDAC-2011-SonkusaleD #integration
Heterogeneous integration of carbon nanotubes and graphene microassemblies for environmental and breath sensing (SRS, MRD), pp. 723–728.
DACDAC-2011-ZukoskiYM #logic
Universal logic modules based on double-gate carbon nanotube transistors (AZ, XY, KM), pp. 884–889.
DATEDATE-2011-ZhangHYG #case study #interface #reliability
Case study: Alleviating hotspots and improving chip reliability via carbon nanotube thermal interface (WZ, JH, SY, PG), pp. 1071–1076.
DACDAC-2010-ZhangBPLWMM #correlation
Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement (JZ, SB, NP, AL, HSPW, GDM, SM), pp. 889–892.
DATEDATE-2010-JamaaMM #logic #power management
Power consumption of logic circuits in ambipolar carbon nanotube technology (MHBJ, KM, GDM), pp. 303–306.
DATEDATE-2010-ZhangPLWM
Carbon nanotube circuits: Living with imperfections and variations (JZ, NP, AL, HSPW, SM), pp. 1159–1164.
DACDAC-2009-PatilLZWM #logic #using
Digital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions (NP, AL, JZ, HSPW, SM), pp. 304–309.
DACDAC-2009-ZhangPHM
Carbon nanotube circuits in the presence of carbon nanotube density variations (JZ, NP, AH, SM), pp. 71–76.
DATEDATE-2009-MitraZPW #logic #using
Imperfection-immune VLSI logic circuits using Carbon Nanotube Field Effect Transistors (SM, JZ, NP, HW), pp. 436–441.
DACDAC-2008-ChoLKC #design #power management
The design of a low power carbon nanotube chemical sensor system (TSC, KJL, JK, APC), pp. 84–89.
DACDAC-2008-KshirsagarEB #analysis #performance
Analysis and implications of parasitic and screening effects on the high-frequency/RF performance of tunneling-carbon nanotube FETs (CK, MNEZ, KB), pp. 250–255.
DATEDATE-2008-ZhangPM #design #guidelines #logic
Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits (JZ, NP, SM), pp. 1009–1014.
DACDAC-2007-NaeemiSM #modelling #multi #optimisation #performance
Performance Modeling and Optimization for Single- and Multi-Wall Carbon Nanotube Interconnects (AN, RS, JDM), pp. 568–573.
DACDAC-2007-PatilDWM #automation #design
Automated Design of Misaligned-Carbon-Nanotube-Immune Circuits (NP, JD, HSPW, SM), pp. 958–961.
DACDAC-2007-ZhangSJ #architecture #configuration management #design #hybrid #named #optimisation
NanoMap: An Integrated Design Optimization Flow for a Hybrid Nanotube/CMOS Dynamically Reconfigurable Architecture (WZ, LS, NKJ), pp. 300–305.
DATEDATE-2007-EachempatiNGVM #architecture
Assessing carbon nanotube bundle interconnect for future FPGA architectures (SE, AN, AG, NV, YM), pp. 307–312.
DATEDATE-2007-HashempourL #detection #fault #modelling
Circuit-level modeling and detection of metallic carbon nanotube defects in carbon nanotube FETs (HH, FL), pp. 841–846.
DACDAC-2006-BanerjeeS #future of #question
Are carbon nanotubes the future of VLSI interconnections? (KB, NS), pp. 809–814.
DACDAC-2006-BudnikRBR
A high density, carbon nanotube capacitor for decoupling applications (MMB, AR, AB, KR), pp. 935–938.
DACDAC-2006-ZhangJS #architecture #configuration management #hybrid #named
NATURE: a hybrid nanotube/CMOS dynamically reconfigurable architecture (WZ, NKJ, LS), pp. 711–716.
CASECASE-2005-LeeH #analysis #array #design
An integrated system of microcantilever arrays with carbon nanotube tips for bio/nano analysis: design and control (EL, HSH), pp. 113–117.
DACDAC-2002-MartelDAWA #logic
Carbon nanotube field-effect transistors and logic circuits (RM, VD, JA, SJW, PA), pp. 94–98.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.