Travelled to:1 × France
1 × Germany
6 × USA
Collaborated with:W.H.Mangione-Smith M.Potkonjak K.Skadron Z.Lu Y.Zhang M.R.Stan H.Zhang M.Putic J.Huang G.Robins B.H.Meyer N.J.George B.H.Calhoun A.B.Kahng S.Mantik I.L.Markov P.Tucker H.Wang G.Wolfe
Talks about:procrastin (2) intellectu (2) watermark (2) properti (2) imprecis (2) schedul (2) protect (2) hardwar (2) voltag (2) system (2)
Person: John Lach
DBLP: Lach:John
Contributed to:
20142012
201120062005200019991998Wrote 8 papers:
- DAC-2014-ZhangPL #hardware #power management
- Low Power GPGPU Computation with Imprecise Hardware (HZ, MP, JL), p. 6.
- DAC-2012-HuangLR #energy #hardware #trade-off #using
- A methodology for energy-quality tradeoff using imprecise hardware (JH, JL, GR), pp. 504–509.
- DATE-2011-MeyerGCLS #cost analysis #execution #safety #using
- Reducing the cost of redundant execution in safety-critical systems using relaxed dedication (BHM, NJG, BHC, JL, KS), pp. 1249–1254.
- DATE-2006-LuZSLS #scheduling #set
- Procrastinating voltage scheduling with discrete frequency sets (ZL, YZ, MRS, JL, KS), pp. 456–461.
- DAC-2005-ZhangLLSS #realtime #scheduling
- Optimal procrastinating voltage scheduling for hard real-time systems (YZ, ZL, JL, KS, MRS), pp. 905–908.
- DAC-2000-LachMP #debugging #detection #fault #locality #performance
- Efficient error detection, localization, and correction for FPGA-based debugging (JL, WHMS, MP), pp. 207–212.
- DAC-1999-LachMP #multi #robust
- Robust FPGA Intellectual Property Protection Through Multiple Small Watermarks (JL, WHMS, MP), pp. 831–836.
- DAC-1998-KahngLMMMPTWW
- Watermarking Techniques for Intellectual Property Protection (ABK, JL, WHMS, SM, ILM, MP, PT, HW, GW), pp. 776–781.