Travelled to:2 × Germany
2 × USA
4 × France
Collaborated with:A.Jantsch A.K.Deb F.Robino K.Petersén A.Hemani B.Navas I.Sander A.Kumar E.Nilsson M.Millberg T.Meincke S.Kumar A.Postula T.Olsson P.Nilsson P.Ellervee D.Lundqvist
Talks about:methodolog (3) system (3) design (3) use (3) dsp (3) network (2) applic (2) masic (2) block (2) chip (2)
Person: Johnny Öberg
DBLP: =Ouml=berg:Johnny
Contributed to:
201420132007
20042004200319991998Wrote 9 papers:
- DATE-2014-RobinoO
- From Simulink to NoC-based MPSoC on FPGA (FR, JÖ), pp. 1–4.
- DATE-2013-NavasSO #array #configuration management #flexibility #framework #platform #reuse
- The RecoBlock SoC platform: a flexible array of reusable run-time-reconfigurable IP-blocks (BN, IS, JÖ), pp. 833–838.
- DATE-2007-PetersenO #2d #scalability #towards
- Toward a scalable test methodology for 2D-mesh Network-on-Chips (KP, JÖ), pp. 367–372.
- DAC-2004-DebJO #design #modelling #paradigm #transaction
- System design for DSP applications in transaction level modeling paradigm (AKD, AJ, JÖ), pp. 466–471.
- DATE-v1-2004-DebJO #design #using
- System Design for DSP Applications Using the MASIC Methodology (AKD, AJ, JÖ), pp. 630–635.
- DATE-2003-DebOJ #analysis #embedded #simulation #using
- Simulation and Analysis of Embedded DSP Systems Using MASIC Methodology (AKD, JÖ, AJ), pp. 11100–11101.
- DATE-2003-NilssonMOJ #network #proximity
- Load Distribution with the Proximity Congestion Awareness in a Network on Chip (EN, MM, JÖ, AJ), pp. 11126–11127.
- DAC-1999-HemaniMKPONOEL #design #power management #using
- Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style (AH, TM, SK, AP, TO, PN, JÖ, PE, DL), pp. 873–878.
- DATE-1998-ObergHK #communication #grammarware #hardware #protocol #scheduling #synthesis
- Scheduling of Outputs in Grammar-based Hardware Synthesis of Data Communication Protocols (JÖ, AH, AK), pp. 596–603.