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Travelled to:
1 × France
1 × Germany
1 × Portugal
1 × USA
Collaborated with:
L.Thiele G.Giannopoulou N.Stoimenov H.Yang P.Kumar D.Rai O.Moreira K.Goossens A.M.Molnos
Talks about:
critic (3) mix (3) processor (2) schedul (2) toler (2) fault (2) time (2) real (2) multiprocessor (1) architectur (1)

Person: Pengcheng Huang

DBLP DBLP: Huang:Pengcheng

Contributed to:

DATE 20152015
DAC 20142014
DATE 20142014
SAC 20132013

Wrote 5 papers:

DATE-2015-HuangKGT #scheduling
Run and be safe: mixed-criticality scheduling with temporary processor speedup (PH, PK, GG, LT), pp. 1329–1334.
DAC-2014-HuangYT #fault tolerance #on the #scheduling
On the Scheduling of Fault-Tolerant Mixed-Criticality Systems (PH, HY, LT), p. 6.
DAC-2014-RaiHST #detection #fault #framework #performance #realtime
An Efficient Real Time Fault Detection and Tolerance Framework Validated on the Intel SCC Processor (DR, PH, NS, LT), p. 6.
DATE-2014-GiannopoulouSHT #architecture #manycore
Mapping mixed-criticality applications on multi-core architectures (GG, NS, PH, LT), pp. 1–6.
SAC-2013-HuangMGM #multi #realtime #scalability
Throughput-constrained voltage and frequency scaling for real-time heterogeneous multiprocessors (PH, OM, KG, AMM), pp. 1517–1524.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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