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Travelled to:
1 × USA
2 × France
2 × Germany
Collaborated with:
L.Benini E.Macii M.Poncino A.Macii G.D.Micheli G.Castelli
Talks about:
power (4) synthesi (2) batteri (2) gate (2) synchron (1) overhead (1) interfac (1) communic (1) schedul (1) portabl (1)

Person: Riccardo Scarsi

DBLP DBLP: Scarsi:Riccardo

Contributed to:

DATE 20012001
DATE 20002000
DAC 19991999
DATE 19991999
ED&TC 19971997

Wrote 5 papers:

DATE-2001-BeniniCMMPS #scheduling
Extending lifetime of portable systems by battery scheduling (LB, GC, AM, EM, MP, RS), pp. 197–203.
DATE-2000-BeniniCMMPS #estimation
A Discrete-Time Battery Model for High-Level Power Estimation (LB, GC, AM, EM, MP, RS), pp. 35–39.
DAC-1999-BeniniMMPS #communication #interface #power management #synthesis
Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses (LB, AM, EM, MP, RS), pp. 128–133.
DATE-1999-BeniniMMMPS #power management
Glitch Power Minimization by Gate Freezing (LB, GDM, AM, EM, MP, RS), pp. 163–167.
EDTC-1997-BeniniMMPS #logic #network #optimisation #synthesis
Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks (LB, GDM, EM, MP, RS), pp. 514–520.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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