BibSLEIGH — Yan

Travelled to:

1 × China
1 × Germany
1 × India
1 × Mexico
1 × Spain
7 × USA

Collaborated with:

X.Jiang M.Prvulovic A.Awad G.Venkataramani J.Lee G.Balakrishnan G.Leedham M.Kharbutli F.Liu J.Torrellas Yuanchao Xu X.Shen S.Lee D.Tiwari J.Tuck I.Doudalis B.Roemer D.Chandra F.Guo S.Kim K.Irwin B.Rogers C.Yan S.Chhabra P.K.Manadhata S.Haber W.Horne A.Samih R.Wang A.Krishna C.Maciocco T.C.Tai N.Madan L.Zhao M.Upton R.Iyer S.Makineni D.Newell R.Balasubramonian

Talks about:

memori (8) effici (4) chip (4) cach (4) multiprocessor (3) architectur (3) programm (2) behavior (2) support (2) protect (2)

Person: Yan Solihin

DBLP: Solihin:Yan

Contributed to:

2014

2013

2012

2011

2010

2008

2007

2006

2005

2004

2001

1997

2016

2020

Wrote 17 papers:

HPCA-2014-AwadS #behaviour #memory management #named: STM: Cloning the spatial and temporal memory access behavior (AA, YS), pp. 237–247.
HPCA-2013-SamihWKMTS #energy: Energy-efficient interconnect via Router Parking (AS, RW, AK, CM, TYCT, YS), pp. 508–519.
HPCA-2012-BalakrishnanS #behaviour #named #probability #using: WEST: Cloning data cache behavior using Stochastic Traces (GB, YS), pp. 387–398.
HPCA-2011-JiangS #architecture #framework #operating system: Architectural framework for supporting operating system survivability (XJ, YS), pp. 456–465.
HPCA-2011-LeeTST #fine-grained #multi #named #thread: HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor (SL, DT, YS, JT), pp. 99–110.
HPCA-2010-JiangMZUIMNSB #adaptation #named: CHOP: Adaptive filter-based DRAM caching for CMP server platforms (XJ, NM, LZ, MU, RI, SM, DN, YS, RB), pp. 1–12.
HPCA-2010-LiuJS #clustering #comprehension #how #memory management #multi #performance: Understanding how off-chip memory bandwidth partitioning in Chip Multiprocessors affects system performance (FL, XJ, YS), pp. 1–12.
HPCA-2008-RogersYCPS #distributed #memory management #multi: Single-level integrity and confidentiality protection for distributed shared memory multiprocessors (BR, CY, SC, MP, YS), pp. 161–172.
HPCA-2008-VenkataramaniDSP #named #programmable: FlexiTaint: A programmable accelerator for dynamic taint propagation (GV, ID, YS, MP), pp. 173–184.
HPCA-2007-VenkataramaniRSP #debugging #memory management #monitoring #named #performance #programmable: MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging (GV, BR, YS, MP), pp. 273–284.
ASPLOS-2006-KharbutliJSVP: Comprehensively and efficiently protecting the heap (MK, XJ, YS, GV, MP), pp. 207–218.
HPCA-2005-ChandraGKS #architecture #multi #predict #thread: Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture (DC, FG, SK, YS), pp. 340–351.
HPCA-2004-KharbutliISL #using: Using Prime Numbers for Cache Indexing to Eliminate Conflict Misses (MK, KI, YS, JL), pp. 288–299.
HPCA-2001-LeeST #architecture #automation #memory management: Automatically Mapping Code on an Intelligent Memory Architecture (JL, YS, JT), pp. 121–132.
ICDAR-1997-SolihinL: Mathematical properties of the native integral ratio handwriting and text extraction technique (YS, GL), p. 1102–?.
ASPLOS-2016-AwadMHSH #in memory #low cost #memory management: Silent Shredder: Zero-Cost Shredding for Secure Non-Volatile Main Memory Controllers (AA, PKM, SH, YS, WH), pp. 263–276.
ASPLOS-2020-XuSS #memory management #named #performance #persistent #reduction #security: MERR: Improving Security of Persistent Memory Objects via Efficient Memory Exposure Reduction and Randomization (YX, YS, XS), pp. 987–1000.