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Travelled to:
1 × Germany
2 × USA
Collaborated with:
S.Yoo A.A.Jerraya M.Youssef A.Sasongko I.Bacivarov A.Bouchhima W.O.Cesário A.Baghdadi L.Gauthier D.Lyonnard G.Nicolescu M.Diaz-Nava
Talks about:
abstract (2) design (2) simul (2) layer (2) base (2) multicor (1) interfac (1) approach (1) hardwar (1) environ (1)

Person: Yanick Paviot

DBLP DBLP: Paviot:Yanick

Contributed to:

DAC 20042004
DATE 20032003
DAC 20022002

Wrote 3 papers:

DAC-2004-YoussefYSPJ #case study #debugging #design #interface #video
Debugging HW/SW interface for MPSoC: video encoder system design case study (MWY, SY, AS, YP, AAJ), pp. 908–913.
DATE-2003-YooBBPJ #abstraction #hardware #modelling #performance #simulation
Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer (SY, IB, AB, YP, AAJ), pp. 10550–10555.
DAC-2002-CesarioBGLNPYJD #approach #component #design #manycore
Component-based design approach for multicore SoCs (WOC, AB, LG, DL, GN, YP, SY, AAJ, MDN), pp. 789–794.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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