Smart bit-width allocation for low power optimization in a systemc based ASIC design environment
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Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou
Smart bit-width allocation for low power optimization in a systemc based ASIC design environment
DATE, 2006.

DATE 2006
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@inproceedings{DATE-2006-MallikSBZ,
	author        = "Arindam Mallik and Debjit Sinha and Prithviraj Banerjee and Hai Zhou",
	booktitle     = "{Proceedings of the 10th Conference on Design, Automation and Test in Europe}",
	doi           = "10.1145/1131655",
	pages         = "618--623",
	publisher     = "{European Design and Automation Association, Leuven, Belgium}",
	title         = "{Smart bit-width allocation for low power optimization in a systemc based ASIC design environment}",
	year          = 2006,
}

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