Proceedings of the Sixth International Symposium on High-Performance Computer Architecture
HPCA, 2000.

@proceedings{HPCA-2000,
	address       = "Toulouse, France",
	ee            = "http://www.computer.org/csdl/proceedings/hpca/2000/0550/00/index.html",
	isbn          = "0-7695-0550-3",
	publisher     = "{IEEE Computer Society}",
	title         = "{Proceedings of the Sixth International Symposium on High-Performance Computer Architecture}",
	year          = 2000,
}

Contents (35 items)

6 ×#performance
5 ×#memory management
5 ×#parallel
3 ×#architecture
3 ×#multi
3 ×#network
3 ×#predict
2 ×#analysis
2 ×#branch
2 ×#clustering

HPCA-2000-BarrosoGNV #integration #performance

Impact of Chip-Level Integration on Performance of OLTP Workloads (LAB, KG, AN, BV), pp. 3–14.

HPCA-2000-TorrellasYN #effectiveness #integration #towards

Toward a Cost-Effective DSM Organization That Exploits Processor-Memory Integration (JT, LY, ATN), pp. 15–25.

HPCA-2000-FigueiredoF #performance

Impact of Heterogeneity on DSM Performance (RJOF, JABF), pp. 26–35.

HPCA-2000-MathewMCD #design #memory management #parallel

Design of a Parallel Vector Access Unit for SDRAM Memory Systems (BKM, SAM, JBC, AD), pp. 39–48.

HPCA-2000-WongB #behaviour #policy

Modified LRU Policies for Improving Second-Level Cache Behavior (WAW, JLB), pp. 49–60.

HPCA-2000-JourdanRAEYR

eXtended Block Cache (SJ, LR, YA, ME, AY, RR), pp. 61–70.

HPCA-2000-PehD

Flit-Reservation Flow Control (LSP, WJD), pp. 73–84.

HPCA-2000-CasadoBQSD #configuration management #evaluation #network #performance

Performance Evaluation of Dynamic Reconfiguration in High-Speed Local Area Networks (RC, AB, FJQ, JLS, JD), pp. 85–96.

HPCA-2000-YumVDS

Investigating QoS Support for Traffic Mixes with the MediaWorm Router (KHY, ASV, CRD, AS), pp. 97–106.

HPCA-2000-BurnsG #layout #question #smt

Quantifying the SMT Layout Overhead — Does SMT Pull Its Weight? (JB, JLG), pp. 109–120.

HPCA-2000-MowryR #memory management #multi #thread #using

Software-Controlled Multithreading Using Informing Memory Operations (TCM, SRR), pp. 121–132.

HPCA-2000-CanalPG #clustering

Dynamic Cluster Assignment Mechanisms (RC, JMP, AG), pp. 133–142.

HPCA-2000-NandaNMJ

High-Throughput Coherence Controllers (AKN, ATN, MMM, DJJ), pp. 145–155.

HPCA-2000-KaxirasY #communication #multi #predict

Coherence Communication Prediction in Shared-Memory Multiprocessors (SK, CY), pp. 156–167.

HPCA-2000-RajwarKG #throughput

Improving the Throughput of Synchronization by Insertion of Delays (RR, AK, JRG), pp. 168–179.

HPCA-2000-JimenezLF #automation #on the #performance

On the Performance of Hand vs. Automatically Optimized Numerical Codes (MJ, JML, AF), pp. 183–194.

HPCA-2000-ChatterjeeS #matrix

Cache-Efficient Matrix Transposition (SC, SS), pp. 195–205.

HPCA-2000-KarlssonDS #data type #linked data #open data

A Prefetching Technique for Irregular Accesses to Linked Data Structures (MK, FD, PS), pp. 206–217.

HPCA-2000-LefurgyPM #runtime

Reducing Code Size with Run-Time Decompression (CL, EP, TNM), pp. 218–228.

HPCA-2000-LeeWY #predict

Decoupled Value Prediction on Trace Processors (SJL, YW, PCY), pp. 231–240.

HPCA-2000-HaungsSF #analysis #branch #classification #metric

Branch Transition Rate: A New Metric for Improved Branch Classification Analysis (MH, PS, MKF), pp. 241–250.

HPCA-2000-PatilE #alias #branch #predict

Combining Static and Dynamic Branch Prediction to Reduce Destructive Aliasing (HP, JSE), pp. 251–262.

HPCA-2000-StetsDKRS #memory management #network #order

The Effect of Network Total Order, Broadcast, and Remote-Write Capability on Network-Based Shared Memory Computing (RS, SD, LIK, UR, MLS), pp. 265–276.

HPCA-2000-BehrPS #architecture #named #parallel

PowerMANNA: A Parallel Architecture Based on the PowerPC MPC620 (PMB, SP, ACS), pp. 277–286.

HPCA-2000-HosomiKNH #architecture #parallel

A DSM Architecture for a Parallel Computer Cenju-4 (TH, YK, MN, TH), pp. 287–298.

HPCA-2000-MoshovosS #dependence #memory management #trade-off

Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors (AM, GSS), pp. 301–312.

HPCA-2000-NeefsVB #latency #multi

A Technique for High Bandwidth and Deterministic Low Latency Load/Store Accesses to Multiple Cache Banks (HN, HV, KDB), pp. 313–324.

HPCA-2000-RamirezLV

Trace Cache Redundancy: Red & Blue Traces (AR, JLLP, MV), pp. 325–333.

HPCA-2000-UysalAS #database #evaluation

Evaluation of Active Disks for Decision Support Databases (MU, AA, JHS), pp. 337–348.

HPCA-2000-CappelloRE #clustering #modelling #performance #programming

Investigating the Performance of Two Programming Models for Clusters of SMP PCs (FC, OR, DE), pp. 349–359.

HPCA-2000-BoschSSRH #analysis #case study #parallel #performance #using #visualisation

Performance Analysis and Visualization of Parallel Systems Using SimOS and Rivet: A Case Study (RB, CS, GS, MR, PH), pp. 360–371.

HPCA-2000-RixnerDKMKO

Register Organization for Media Processing (SR, WJD, BK, PRM, UJK, JDO), pp. 375–386.

HPCA-2000-RadhakrishnanVJS #architecture #java #runtime

Architectural Issues in Java Runtime Systems (RR, NV, LKJ, AS), pp. 387–398.

HPCA-2000-VartanianBD #3d #parallel

The Best Distribution for a Parallel OpenGL 3D Engine with Texture Caches (AV, JLB, NDT), pp. 399–408.

HPCA-2000-ChiuehP #design #memory management #network

Cache Memory Design for Network Processors (TcC, PP), pp. 409–418.