Low-voltage on-chip cache architecture using heterogeneous cell sizes for high-performance processors
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Hamid Reza Ghasemi, Stark C. Draper, Nam Sung Kim
Low-voltage on-chip cache architecture using heterogeneous cell sizes for high-performance processors
HPCA, 2011.

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@inproceedings{HPCA-2011-GhasemiDK,
	author        = "Hamid Reza Ghasemi and Stark C. Draper and Nam Sung Kim",
	booktitle     = "{Proceedings of the 17th International Conference on High-Performance Computer Architecture}",
	doi           = "10.1109/HPCA.2011.5749715",
	isbn          = "978-1-4244-9432-3",
	pages         = "38--49",
	publisher     = "{IEEE Computer Society}",
	title         = "{Low-voltage on-chip cache architecture using heterogeneous cell sizes for high-performance processors}",
	year          = 2011,
}

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