Travelled to:1 × USA
2 × France
Collaborated with:V.Zaccaria R.Zafalon M.Sami D.Sciuto C.Silvano
Talks about:instruct (2) power (2) optim (2) level (2) estim (2) embed (2) vliw (2) methodolog (1) processor (1) industri (1)
Person: Andrea Bona
DBLP: Bona:Andrea
Contributed to:
2004
20022002Wrote 3 papers:
- DATE-DF-2004-BonaZZ #industrial #modelling #simulation
- System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip (AB, VZ, RZ), pp. 318–323.
- DAC-2002-BonaSSZSZ #clustering #embedded #energy #estimation #optimisation
- Energy estimation and optimization of embedded VLIW processors based on instruction clustering (AB, MS, DS, VZ, CS, RZ), pp. 886–891.
- DATE-2002-BonaSSZSZ #embedded #estimation #optimisation
- An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW Cores (AB, MS, DS, VZ, CS, RZ), p. 1128.