Travelled to:1 × France
2 × USA
3 × Germany
Collaborated with:A.Knoll J.Huang C.Buckl H.Shah R.Bodík J.K.Anlauf G.Zachmann S.Hochgürtel B.Bartyzel K.Huang J.O.Blech
Talks about:detect (3) base (3) heterogen (2) prioriti (2) schedul (2) network (2) hardwar (2) acceler (2) system (2) collis (2)
Person: Andreas Raabe
DBLP: Raabe:Andreas
Contributed to:
2012
20122011
2011200920062005Wrote 9 papers:
- DAC-2012-HuangHRBK #detection #embedded #fault tolerance #towards
- Towards fault-tolerant embedded systems with imperfect fault detection (JH, KH, AR, CB, AK), pp. 188–196.
- DATE-2012-HuangBRBK #scheduling #smt
- Static scheduling of a Time-Triggered Network-on-Chip based on SMT solving (JH, JOB, AR, CB, AK), pp. 509–514.
- DATE-2012-ShahRK #bound #scheduling #using
- Bounding WCET of applications using SDRAM with Priority Based Budget Scheduling in MPSoCs (HS, AR, AK), pp. 665–670.
- DATE-2011-HuangRBK #adaptation #runtime #workflow
- A workflow for runtime adaptive task allocation on heterogeneous MPSoCs (JH, AR, CB, AK), pp. 1119–1134.
- DATE-2011-ShahRK #bound #latency #performance
- Priority division: A high-speed shared-memory bus arbitration with bounded latency (HS, AR, AK), pp. 1497–1500.
- PDP-2011-HuangBRK #energy #multi
- Energy-Aware Task Allocation for Network-on-Chip Based Heterogeneous Multiprocessor Systems (JH, CB, AR, AK), pp. 447–454.
- DAC-2009-RaabeB #hardware #sketching
- Synthesizing hardware from sketches (AR, RB), pp. 623–624.
- DATE-DF-2006-RaabeHAZ #detection #prototype
- Space-efficient FPGA-accelerated collision detection for virtual prototyping (AR, SH, JKA, GZ), pp. 206–211.
- DATE-2005-RaabeBAZ #architecture #detection #hardware #simulation
- Hardware Accelerated Collision Detection — An Architecture and Simulation Results (AR, BB, JKA, GZ), pp. 130–135.