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Travelled to:
4 × USA
Collaborated with:
L.C.Cote K.H.Khokhani D.C.Bossen D.L.Ostapko M.S.Schmookler W.Ferguson J.Sessa D.Hatton
Talks about:
placement (4) problem (3) circuit (2) lsi (2) masterslic (1) manufactur (1) interchang (1) algorithm (1) procedur (1) variabl (1)

Person: Arvind M. Patel

DBLP DBLP: Patel:Arvind_M=

Contributed to:

DAC 19811981
DAC 19801980
DAC 19771977
DAC 19711971

Wrote 6 papers:

Placement of variable size circuits on LSI masterslices (KHK, AMP, WF, JS, DH), pp. 426–434.
DAC-1981-PatelC #clustering #problem
Partitioning for VLSI placement problems (AMP, LCC), pp. 411–418.
DAC-1980-CoteP #algorithm #problem
The interchange algorithms for circuit placement problems (LCC, AMP), pp. 528–534.
Computer-aided assignment of manufacturing tolerances (AMP), pp. 129–133.
DAC-1977-KhokhaniP #layout #problem
The chip layout problem: A placement procedure for lsi (KHK, AMP), pp. 291–297.
DAC-1971-BossenOPS #network
Minimum test patterns for residue networks (DCB, DLO, AMP, MSS), pp. 278–284.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.