BibSLEIGH corpus
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Travelled to:
1 × France
1 × USA
2 × Germany
Collaborated with:
J.Resano J.A.Maestro F.Catthoor R.Hermida H.Mecha
Talks about:
reconfigur (4) hardwar (4) macroscop (2) overhead (2) codesign (2) schedul (2) minim (2) dynam (2) time (2) heterogen (1)

Person: Daniel Mozos

DBLP DBLP: Mozos:Daniel

Contributed to:

DATE 20052005
DAC 20042004
DATE 19991999
DATE 19981998

Wrote 4 papers:

DATE-2005-ResanoMC #configuration management #hardware #heuristic #hybrid #runtime #scheduling
A Hybrid Prefetch Scheduling Heuristic to Minimize at Run-Time the Reconfiguration Overhead of Dynamically Reconfigurable Hardware (JR, DM, FC), pp. 106–111.
DAC-2004-ResanoM #configuration management #hardware #scheduling
Specific scheduling support to minimize the reconfiguration overhead of dynamically reconfigurable hardware (JR, DM), pp. 119–124.
DATE-1999-MaestroMH #approach #hardware #problem
The Heterogeneous Structure Problem in Hardware/Software Codesign: A Macroscopic Approach (JAM, DM, RH), pp. 766–767.
DATE-1998-MaestroMM #clustering #estimation #hardware #parallel #process
A Macroscopic Time and Cost Estimation Model Allowing Task Parallelism and Hardware Sharing for the Codesign Partitioning Process (JAM, DM, HM), pp. 218–225.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.