BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × Germany
2 × France
2 × USA
Collaborated with:
C.Forzan L.T.Pileggi A.J.Strojwas N.Andrikos L.Lavagno C.P.Sotiriou E.Charbon E.Malavasi A.L.Sangiovanni-Vincentelli P.J.Doriol Y.Villavicencio M.Rotigni G.Graziosi
Talks about:
awar (2) microcontrol (1) desynchron (1) placement (1) synthesi (1) synchron (1) simultan (1) behavior (1) librari (1) congest (1)

Person: Davide Pandini

DBLP DBLP: Pandini:Davide

Contributed to:

DATE 20092009
DAC 20072007
DATE 20052005
DATE 20022002
DAC 19941994

Wrote 5 papers:

DATE-2009-DoriolVFRGP #design
EMC-aware design on a microcontroller for automotive applications (PJD, YV, CF, MR, GG, DP), pp. 1208–1213.
A Fully-Automated Desynchronization Flow for Synchronous Circuits (NA, LL, DP, CPS), pp. 982–985.
DATE-2005-ForzanP #analysis #behaviour #library #modelling
Modeling the Non-Linear Behavior of Library Cells for an Accurate Static Noise Analysis (CF, DP), pp. 982–983.
DATE-2002-PandiniPS #logic #synthesis
Congestion-Aware Logic Synthesis (DP, LTP, AJS), pp. 664–671.
DAC-1994-CharbonMPS #optimisation
Simultaneous Placement and Module Optimization of Analog IC’s (EC, EM, DP, ALSV), pp. 31–35.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.