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Travelled to:
1 × Germany
1 × USA
2 × France
Collaborated with:
X.Zeng C.Chiang W.Cai L.Feng J.Cong K.Leung H.Zhu J.Xue Q.Fang Y.Su X.Zhou J.Liu R.Li
Talks about:
method (3) interconnect (2) nonlinear (2) analysi (2) variat (2) reduct (2) colloc (2) order (2) model (2) base (2)

Person: Dian Zhou

DBLP DBLP: Zhou:Dian

Contributed to:

DATE 20072007
DATE 20062006
DATE v2 20042004
DAC 19931993

Wrote 5 papers:

DATE-2007-ZhuZCXZ #grid #probability #process
A sparse grid based spectral stochastic collocation method for variations-aware capacitance extraction of interconnects under nanometer process technology (HZ, XZ, WC, JX, DZ), pp. 1514–1519.
DATE-2006-ZengFSCZC #domain model #order #reduction
Time domain model order reduction by wavelet collocation method (XZ, LF, YS, WC, DZ, CC), pp. 21–26.
DATE-v2-2004-FengZCZF #analysis #order #reduction
Direct Nonlinear Order Reduction with Variational Analysis (LF, XZ, CC, DZ, QF), pp. 1316–1321.
DATE-v2-2004-ZhouZLLZC #analysis #using
Steady-State Analysis of Nonlinear Circuits Using Discrete Singular Convolution Method (XZ, DZ, JL, RL, XZ, CC), pp. 1322–1326.
DAC-1993-CongLZ #design #distributed
Performance-Driven Interconnect Design Based on Distributed RC Delay Model (JC, KSL, DZ), pp. 606–611.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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