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Travelled to:
1 × Germany
1 × Sweden
2 × France
4 × USA
Collaborated with:
Y.Wang Z.Shao Z.Qin T.Wang Y.Guan M.J.Ciesielski C.Yu W.Brown A.Rossi C.Zhang R.Chen M.Wang K.Zhong L.Long X.Zhu W.Liu Q.Zhuge E.H.Sha
Talks about:
flash (10) memori (5) translat (4) system (4) layer (4) nand (4) storag (3) write (3) level (2) reus (2)

Person: Duo Liu

DBLP DBLP: Liu:Duo

Contributed to:

DAC 20152015
DATE 20152015
DAC 20142014
LCTES 20132013
DATE 20122012
DAC 20112011
DATE 20112011
LCTES 20102010

Wrote 8 papers:

DAC-2015-CiesielskiYBLR #verification
Verification of gate-level arithmetic circuits by function extraction (MJC, CY, WB, DL, AR), p. 6.
DATE-2015-ZhongLLZLZS #mobile #named
nCode: limiting harmful writes to emerging mobile NVRAM through code swapping (KZ, DL, LL, XZ, WL, QZ, EHMS), pp. 1305–1310.
DAC-2014-ZhangWWCLS
Deterministic Crash Recovery for NAND Flash Based Storage Systems (CZ, YW, TW, RC, DL, ZS), p. 6.
LCTES-2013-WangLWS #hybrid #memory management #named #reduction
FTL2: a hybrid flash translation layer with logging for write reduction in flash memory (TW, DL, YW, ZS), pp. 91–100.
DATE-2012-LiuWWQS #embedded #memory management #process
A block-level flash memory management scheme for reducing write activities in PCM-based embedded systems (DL, TW, YW, ZQ, ZS), pp. 1447–1450.
DAC-2011-QinWLSG #memory management #named #performance
MNFTL: an efficient flash translation layer for MLC NAND flash memory storage systems (ZQ, YW, DL, ZS, YG), pp. 17–22.
DATE-2011-WangLQS #memory management #reuse
An endurance-enhanced Flash Translation Layer via reuse for NAND flash memory storage systems (YW, DL, ZQ, ZS), pp. 14–19.
LCTES-2010-WangLWQSG #memory management #named
RNFTL: a reuse-aware NAND flash translation layer for flash memory (YW, DL, MW, ZQ, ZS, YG), pp. 163–172.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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