Travelled to:
1 × Sweden
2 × France
2 × Germany
4 × USA
Collaborated with:
Y.Wang D.Liu Z.Qin T.Wang Y.Guan L.A.D.Bathen N.D.Dutt E.H.Sha M.Qiu R.Chen C.J.Xue C.Xue G.Wang C.Zhang M.Wang
Talks about:
flash (14) memori (8) system (7) nand (7) translat (4) storag (4) layer (4) block (4) log (3) strategi (2)
Person: Zili Shao
DBLP: Shao:Zili
Contributed to:
Wrote 11 papers:
- DAC-2014-ZhangWWCLS
- Deterministic Crash Recovery for NAND Flash Based Storage Systems (CZ, YW, TW, RC, DL, ZS), p. 6.
- LCTES-2013-GuanWWCS #named
- BLog: block-level log-block management for NAND flash memorystorage systems (YG, GW, YW, RC, ZS), pp. 111–120.
- LCTES-2013-WangLWS #hybrid #memory management #named #reduction
- FTL2: a hybrid flash translation layer with logging for write reduction in flash memory (TW, DL, YW, ZS), pp. 91–100.
- DAC-2012-WangBDS #memory management #metadata #named #reliability
- Meta-Cure: a reliability enhancement strategy for metadata in NAND flash memory storage systems (YW, LADB, NDD, ZS), pp. 214–219.
- DATE-2012-LiuWWQS #embedded #memory management #process
- A block-level flash memory management scheme for reducing write activities in PCM-based embedded systems (DL, TW, YW, ZQ, ZS), pp. 1447–1450.
- DATE-2012-WangBSD #3d #memory management #named
- 3D-FlashMap: A physical-location-aware block mapping strategy for 3D NAND flash memory (YW, LADB, ZS, NDD), pp. 1307–1312.
- DAC-2011-QinWLSG #memory management #named #performance
- MNFTL: an efficient flash translation layer for MLC NAND flash memory storage systems (ZQ, YW, DL, ZS, YG), pp. 17–22.
- DATE-2011-WangLQS #memory management #reuse
- An endurance-enhanced Flash Translation Layer via reuse for NAND flash memory storage systems (YW, DL, ZQ, ZS), pp. 14–19.
- LCTES-2010-WangLWQSG #memory management #named
- RNFTL: a reuse-aware NAND flash translation layer for flash memory (YW, DL, MW, ZQ, ZS, YG), pp. 163–172.
- DATE-2008-XueSSQ #clustering #constraints #effectiveness #memory management #scheduling
- Effective Loop Partitioning and Scheduling under Memory and Register Dual Constraints (CJX, EHMS, ZS, MQ), pp. 1202–1207.
- DATE-2007-QiuXSS #embedded #energy #multi #realtime
- Energy minimization with soft real-time and DVS for uniprocessor and multiprocessor embedded systems (MQ, CX, ZS, EHMS), pp. 1641–1646.