Travelled to:3 × USA
Collaborated with:C.A.Papachristou F.J.Ferguson T.Larrabee E.K.Moghaddam N.Mukherjee J.Rajski D.Solanki J.Tyszer J.Zawada
Talks about:interconnect (1) algorithm (1) schedul (1) realist (1) program (1) pattern (1) network (1) method (1) linear (1) follow (1)
Person: Haluk Konuk
DBLP: Konuk:Haluk
Contributed to:
201519951990Wrote 3 papers:
- DAC-2015-KonukMMRSTZ #design
- Design for low test pattern counts (HK, EKM, NM, JR, DS, JT, JZ), p. 6.
- DAC-1995-KonukFL #fault #network #performance #simulation
- Accurate and Efficient Fault Simulation of Realistic CMOS Network Breaks (HK, FJF, TL), pp. 345–351.
- DAC-1990-PapachristouK #algorithm #linear #optimisation #scheduling
- A Linear Program Driven Scheduling and Allocation Method Followed by an Interconnect Optimization Algorithm (CAP, HK), pp. 77–83.