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Travelled to:
1 × Germany
3 × France
9 × USA
Collaborated with:
J.Tyszer S.M.Reddy I.Pomeranz M.Kassab G.Mrugalski N.Mukherjee A.H.El-Maleh K.Tsai K.Thapar S.Pateras G.Chen X.Bai S.Dey S.Remersaro D.Goswami D.Czysz S.Hellebrand M.Marek-Sadowska T.E.Marchok W.Maly M.Gebala H.Tang C.Wang H.Konuk E.K.Moghaddam D.Solanki J.Zawada
Talks about:
test (13) pattern (5) generat (4) circuit (3) data (3) diagnosi (2) respons (2) random (2) design (2) applic (2)

Person: Janusz Rajski

DBLP DBLP: Rajski:Janusz

Contributed to:

DAC 20152015
DAC 20142014
DATE 20092009
DAC 20072007
DAC 20062006
DATE 20052005
DATE v2 20042004
DATE 20022002
DAC 20002000
DAC 19981998
DAC 19971997
DAC 19951995
DAC 19911991

Wrote 16 papers:

DAC-2015-KonukMMRSTZ #design
Design for low test pattern counts (HK, EKM, NM, JR, DS, JT, JZ), p. 6.
DAC-2014-GebalaMMRT #on the #using
On Using Implied Values in EDT-based Test Compression (MG, GM, NM, JR, JT), p. 6.
DATE-2009-RemersaroRRP #generative #scalability #testing
A scalable method for the generation of small test sets (SR, JR, SMR, IP), pp. 1136–1141.
DAC-2007-GoswamiTKR #constraints #exception #generative #testing
Test Generation in the Presence of Timing Exceptions and Constraints (DG, KHT, MK, JR), pp. 688–693.
DAC-2007-MrugalskiRCT #power management #testing
New Test Data Decompressor for Low Power Applications (GM, JR, DC, JT), pp. 539–544.
DAC-2006-ChenRPR #algorithm
A test pattern ordering algorithm for diagnosis with truncated fail data (GC, SMR, IP, JR), pp. 399–404.
DAC-2006-MrugalskiRT #programmable
Test response compactor with programmable selector (GM, JR, JT), pp. 1089–1094.
DATE-2005-TangCRWRP #fault
Defect Aware Test Patterns (HT, GC, SMR, CW, JR, IP), pp. 450–455.
DATE-v2-2004-RajskiT #design #question #requirements #what
Nanometer Design: What are the Requirements for Manufacturing Test? (JR, KT), pp. 930–937.
DATE-2002-PomeranzRR #debugging #fault
Finding a Common Fault Response for Diagnosis during Silicon Debug (IP, JR, SMR), p. 1116.
DAC-2000-BaiDR #self
Self-test methodology for at-speed test of crosstalk in chip interconnects (XB, SD, JR), pp. 619–624.
DAC-1998-El-MalehKR #learning #performance
A Fast Sequential Learning Technique for Real Circuits with Application to Enhancing ATPG Performance (AHEM, MK, JR), pp. 625–631.
DAC-1997-TsaiHRM #generative #named #random
STARBIST: Scan Autocorrelated Random Pattern Generation (KHT, SH, JR, MMS), pp. 472–477.
DAC-1995-El-MalehMRM #on the #testing
On Test Set Preservation of Retimed Circuits (AHEM, TEM, JR, WM), pp. 176–182.
DAC-1995-KassabMRT #architecture #fault #functional #simulation
Software Accelerated Functional Fault Simulation for Data-Path Architectures (MK, NM, JR, JT), pp. 333–338.
DAC-1991-PaterasR #correlation #generative #multi #random #testing
Generation of Correlated Random Patterns for the Complete Testing of Synthesized Multi-level Circuits (SP, JR), pp. 347–352.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.