Travelled to:1 × Canada
1 × France
5 × USA
Collaborated with:C.Pereira G.Lueck J.S.Emer C.Luk R.S.Cohn R.Muth P.G.Lowney M.Stallcup J.Cownie L.Wu R.Mirani B.Olsen W.W.Hwu Y.Wang R.Gupta I.Neamtiu A.Klauser S.Wallace V.J.Reddi K.M.Hazelwood
Talks about:dynam (4) debug (4) pin (3) determinist (2) instrument (2) framework (2) program (2) analysi (2) replay (2) optim (2)
Person: Harish Patil
DBLP: Patil:Harish
Contributed to:
201420122010
20052004
20001999Wrote 7 papers:
- CGO-2014-WangPPLGN #debugging #named #slicing
- DrDebug: Deterministic Replay based Cyclic Debugging with Dynamic Slicing (YW, HP, CP, GL, RG, IN), p. 98.
- CGO-2012-LueckPP #debugging #interface #named
- PinADX: an interface for customizable debugging with dynamic instrumentation (GL, HP, CP), pp. 114–123.
- CGO-2010-PatilPSLC #analysis #framework #named #parallel #source code
- PinPlay: a framework for deterministic replay and reproducible analysis of parallel programs (HP, CP, MS, GL, JC), pp. 2–11.
- PLDI-2005-LukCMPKLWRH #named #program analysis #tool support
- Pin: building customized program analysis tools with dynamic instrumentation (CKL, RSC, RM, HP, AK, PGL, SW, VJR, KMH), pp. 190–200.
- CGO-2004-LukMPCL #architecture #named
- Ispike: A Post-link Optimizer for the Intel®Itanium®Architecture (CKL, RM, HP, RSC, PGL), pp. 15–26.
- HPCA-2000-PatilE #alias #branch #predict
- Combining Static and Dynamic Branch Prediction to Reduce Destructive Aliasing (HP, JSE), pp. 251–262.
- PLDI-1999-WuMPOH #debugging #framework
- A New Framework for Debugging Globally Optimized Code (LCW, RM, HP, BO, WmWH), pp. 181–191.