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Travelled to:
1 × China
1 × France
1 × Portugal
1 × Switzerland
2 × USA
Collaborated with:
F.Afram E.Aktas H.Zeng J.Rosswog J.W.Ryder K.R.Desai D.Ponomarev G.Kucuk A.K.Jayendran B.T.Stein S.Case A.Patel S.Chen M.T.Yourst D.V.Ponomarev
Talks about:
processor (2) multicor (2) simul (2) power (2) microprocessor (1) contemporari (1) superscalar (1) implement (1) prototyp (1) platform (1)

Person: Kanad Ghose

DBLP DBLP: Ghose:Kanad

Contributed to:

HPCA 20132013
SAC 20132013
PDP 20122012
DAC 20112011
SAC 20102010
DAC 20092009
DATE 20022002
SAC 19991999
PDP 19971997

Wrote 10 papers:

HPCA-2013-AframZG #implementation
A group-commit mechanism for ROB-based processors implementing the X86 ISA (FA, HZ, KG), pp. 47–58.
SAC-2013-AktasG #assessment #authentication #control flow #platform #runtime
Run-time control flow authentication: an assessment on contemporary x86 platforms (EA, KG), pp. 1859–1866.
PDP-2012-CaseAAG #energy
Energy-Aware Load Direction for Servers: A Feasibility Study (SC, FA, EA, KG), pp. 359–367.
DAC-2011-PatelACG #manycore #named
MARSS: a full system simulator for multicore x86 CPUs (AP, FA, SC, KG), pp. 1050–1055.
SAC-2010-RosswogG #clustering #detection #mobile
Efficiently detecting clusters of mobile objects in the presence of dense noise (JR, KG), pp. 1095–1102.
DAC-2009-ZengYGP #manycore #named
MPTLsim: a simulator for X86 multicore processors (HZ, MTY, KG, DVP), pp. 226–231.
DATE-2002-PonomarevKG #estimation #named
AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors (DP, GK, KG), pp. 124–129.
SAC-1999-RyderG #editing #multi
Multi-Sensory Browser and Editor Model (JWR, KG), pp. 443–449.
PDP-1997-DesaiG #network #polynomial
Generalized cubic networks (KRD, KG), pp. 116–126.
PDP-1997-GhoseJS #message passing #prototype
Protected, low-latency message passing in the SNOW prototype (KG, AKJ, BTS), pp. 314–321.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.