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Travelled to:
1 × Germany
1 × USA
Collaborated with:
L.Peh C.O.Chen A.DeOrio V.Bertacco J.Moses R.Illikkal R.Iyer D.Newell
Talks about:
chip (2) probabilist (1) architectur (1) distribut (1) recoveri (1) inaccess (1) network (1) control (1) variat (1) system (1)

Person: Konstantinos Aisopos

DBLP DBLP: Aisopos:Konstantinos

Contributed to:

DATE 20122012
DAC 20112011

Wrote 3 papers:

DATE-2012-AisoposMIIN #named #probability
PCASA: Probabilistic control-adjusted Selective Allocation for shared caches (KA, JM, RI, RI, DN), pp. 473–478.
DAC-2011-AisoposCP #fault #modelling
Enabling system-level modeling of variation-induced faults in networks-on-chips (KA, CHOC, LSP), pp. 930–935.
DAC-2011-DeOrioABP #architecture #distributed #manycore #named
DRAIN: distributed recovery architecture for inaccessible nodes in multi-core chips (AD, KA, VB, LSP), pp. 912–917.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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