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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × China
1 × France
1 × Iceland
2 × USA
Collaborated with:
L.Peh T.Krishna S.Park K.Aisopos W.Kwon J.Ding V.Dubois B.Yang C.Cheng S.Subramanian A.P.Chandrakasan B.K.Daya A.Chandrakasan
Talks about:
chip (3) smart (2) no (2) reconfigur (1) prototyp (1) approach (1) theoret (1) network (1) barrier (1) variat (1)

Person: Chia-Hsin Owen Chen

DBLP DBLP: Chen:Chia=Hsin_Owen

Contributed to:

DATE 20132013
HPCA 20132013
DAC 20122012
DAC 20112011
ICALP (2) 20082008

Wrote 5 papers:

DATE-2013-ChenPKSCP #configuration management #named
SMART: a single-cycle reconfigurable NoC for SoC applications (CHOC, SP, TK, SS, APC, LSP), pp. 338–343.
HPCA-2013-KrishnaCKP #latency #using
Breaking the on-chip latency barrier using SMART (TK, CHOC, WCK, LSP), pp. 378–389.
DAC-2012-ParkKCDCP #prototype
Approaching the theoretical limits of a mesh NoC with a 16-node chip prototype in 45nm SOI (SP, TK, CHOC, BKD, AC, LSP), pp. 398–405.
DAC-2011-AisoposCP #fault #modelling
Enabling system-level modeling of variation-induced faults in networks-on-chips (KA, CHOC, LSP), pp. 930–935.
ICALP-C-2008-DingDYCC #question
Could SFLASH be Repaired? (JD, VD, BYY, CHOC, CMC), pp. 691–701.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.