Travelled to:3 × USA
Collaborated with:P.Six H.D.Man I.Vandeweerd L.Rijnders D.Verkest J.L.d.S.Jr. C.Ykman-Couvreur M.Miranda S.Wuytack G.G.d.Jong F.Catthoor A.Mallik P.Zuber T.Liu B.Chava B.Ballal P.R.D.Bario R.Baert J.Ryckaert M.Badaroglu A.Mercha
Talks about:data (2) technolog (1) framework (1) transfer (1) systemat (1) synthesi (1) superflu (1) structur (1) regular (1) generat (1)
Person: Kris Croes
DBLP: Croes:Kris
Contributed to:
201319981989Wrote 3 papers:
- DAC-2013-MallikZLCBBBCRBMV #analysis #evaluation #framework #named
- TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes (AM, PZ, TTL, BC, BB, PRDB, RB, KC, JR, MB, AM, DV), p. 6.
- DAC-1998-SilvaYMCWJCVSM #data transfer #performance #synthesis
- Efficient System Exploration and Synthesis of Applications with Dynamic Data Storage and Intensive Data Transfer (JLdSJ, CYC, MM, KC, SW, GGdJ, FC, DV, PS, HDM), pp. 76–81.
- DAC-1989-VandweerdCRSM #automation #generative #named
- REDUSA: Module Generation by Automatic Elimination of Superfluous Blocks in Regular Structures (IV, KC, LR, PS, HDM), pp. 694–697.