Travelled to:1 × France
1 × Germany
2 × USA
Collaborated with:P.Schaumont S.Vernalde I.Bolsens M.Engels R.Cmar I.Vandeweerd K.Croes P.Six H.D.Man
Talks about:environ (2) design (2) speed (2) rate (2) high (2) asic (2) telecommun (1) methodolog (1) synthesi (1) superflu (1)
Person: Luc Rijnders
DBLP: Rijnders:Luc
Contributed to:
1999
199819971989Wrote 4 papers:
- DATE-1999-CmarRSVB #design #fixpoint #refinement
- A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement (RC, LR, PS, SV, IB), p. 271–?.
- DAC-1998-SchaumontVREB #design #programming
- A Programming Environment for the Design of Complex High Speed ASICs (PS, SV, LR, ME, IB), pp. 315–320.
- EDTC-1997-SchaumontVREB #multi #synthesis
- Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications (PS, SV, LR, ME, IB), pp. 542–546.
- DAC-1989-VandweerdCRSM #automation #generative #named
- REDUSA: Module Generation by Automatic Elimination of Superfluous Blocks in Regular Structures (IV, KC, LR, PS, HDM), pp. 694–697.