Travelled to:1 × China
1 × France
1 × Germany
2 × USA
Collaborated with:T.M.Pinkston D.Zhu M.Pedram L.Zhao S.Yue R.Wang W.Choi J.T.Draper
Talks about:network (3) power (3) applic (2) gate (2) chip (2) base (2) map (2) no (2) temperatur (1) processor (1)
Person: Lizhong Chen
DBLP: Chen:Lizhong
Contributed to:
2015
2015201420142013Wrote 6 papers:
- DATE-2015-ZhuCPP #manycore #named
- TAPP: temperature-aware application mapping for NoC-based many-core processors (DZ, LC, TMP, MP), pp. 1241–1244.
- HPCA-2015-ChenZPP #towards
- Power punch: Towards non-blocking power-gating of NoC routers (LC, DZ, MP, TMP), pp. 378–389.
- DATE-2014-ZhuCYP
- Application mapping for express channel-based networks-on-chip (DZ, LC, SY, MP), pp. 1–6.
- HPCA-2014-ChenZWP #named #performance
- MP3: Minimizing performance penalty for power-gating of Clos network-on-chip (LC, LZ, RW, TMP), pp. 296–307.
- HPCA-2013-ChenP
- Worm-Bubble Flow Control (LC, TMP), pp. 366–377.
- HPCA-2013-ZhaoCCD #memory management #transaction
- In-network traffic regulation for Transactional Memory (LZ, WC, LC, JTD), pp. 520–531.