Travelled to:1 × China
1 × France
3 × USA
Collaborated with:L.Chen D.Zhu M.Pedram W.H.Ho L.Zhao R.Wang
Talks about:power (3) gate (2) chip (2) no (2) interconnect (1) temperatur (1) methodolog (1) processor (1) communic (1) perform (1)
Person: Timothy Mark Pinkston
DBLP: Pinkston:Timothy_Mark
Contributed to:
2015
2015201420132003Wrote 5 papers:
- DATE-2015-ZhuCPP #manycore #named
- TAPP: temperature-aware application mapping for NoC-based many-core processors (DZ, LC, TMP, MP), pp. 1241–1244.
- HPCA-2015-ChenZPP #towards
- Power punch: Towards non-blocking power-gating of NoC routers (LC, DZ, MP, TMP), pp. 378–389.
- HPCA-2014-ChenZWP #named #performance
- MP3: Minimizing performance penalty for power-gating of Clos network-on-chip (LC, LZ, RW, TMP), pp. 296–307.
- HPCA-2013-ChenP
- Worm-Bubble Flow Control (LC, TMP), pp. 366–377.
- HPCA-2003-HoP #communication #design #performance
- A Methodology for Designing Efficient On-Chip Interconnects on Well-Behaved Communication Patterns (WHH, TMP), pp. 377–388.