Travelled to:1 × France
1 × Germany
Collaborated with:W.Dehaene P.Marchal F.Catthoor A.Vignon S.Cosemans P.Marchal T.Carlson M.Palkovic L.Benini
Talks about:sram (2) dram (2) interconnect (1) architectur (1) configur (1) perform (1) context (1) system (1) replac (1) memori (1)
Person: Marco Facchini
DBLP: Facchini:Marco
Contributed to:
20102009Wrote 3 papers:
- DATE-2010-FacchiniMCD #3d #configuration management #memory management
- An RDL-configurable 3D memory tier to replace on-chip SRAM (MF, PM, FC, WD), pp. 291–294.
- DATE-2009-FacchiniCVPCDBM #3d #evaluation #mobile #performance
- System-level power/performance evaluation of 3D stacked DRAMs for mobile applications (MF, TC, AV, MP, FC, WD, LB, PM), pp. 923–928.
- DATE-2009-VignonCDMF #3d #architecture #novel
- A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context (AV, SC, WD, PM, MF), pp. 929–933.