Travelled to:1 × Germany
2 × USA
Collaborated with:N.V.Shenoy A.L.Sangiovanni-Vincentelli K.Sato H.Emura N.Maeda W.Rosenstiel R.A.Bergamaschi F.Ghenassia T.Grötker M.C.v.Lier A.Mayer M.Meredith M.Milligan S.Swan
Talks about:submicron (1) techniqu (1) system (1) market (1) layout (1) design (1) verif (1) there (1) optim (1) clock (1)
Person: Masamichi Kawarabayashi
DBLP: Kawarabayashi:Masamichi
Contributed to:
2005
19961993Wrote 3 papers:
- DATE-2005-RosenstielBGGKLMMMS #question #tool support
- Is there a Market for SystemC Tools? (WR, RAB, FG, TG, MK, MCvL, AM, MM, MM, SS), p. 950.
- DAC-1996-SatoKEM #design #optimisation
- Post-Layout Optimization for Deep Submicron Design (KS, MK, HE, NM), pp. 740–745.
- DAC-1993-KawarabayashiSS #verification
- A Verification Technique for Gated Clock (MK, NVS, ALSV), pp. 123–127.